Optimized Control of a Five-Level Transformerless Inverter Using Bayesian Techniques

Tajamul Hayat Parray^1,*, Salman Ahmad² and Farhad Ilahi Bakhsh¹

¹Department of Electrical Engineering, National Institute of Technology, Srinagar, Srinagar (J&K), India
²Department of Electrical Engineering, Islamic University of Science & Technology, Kashmir, India
E-mail: tajamulhayat05@gmail.com
*Corresponding Author

Received 07 May 2026; Accepted 05 June 2026

Abstract

Common-ground (CG) based transformerless multilevel inverters (MLIs) are well-suited for grid-connected photovoltaic (PV) applications, because of their ability to eliminate leakage current and high efficiency. In this paper a reduced-switch CG five-level transformerless inverter (CG-5L-TLI) is presented that uses a dc source, one diode, seven switches and two capacitors. The proposed topology inherently eliminates leakage current, offers boosting of voltage without the need for any extra boost converter, and also ensures voltage balancing of the capacitors without requiring auxiliary control circuits. To improve the quality of output waveform, a selective harmonic elimination (SHE) strategy is employed, with optimal switching angles determined using a Bayesian optimization approach for the multilevel SHE-PWM scheme. The performance and effectiveness of the suggested system are validated via detailed MATLAB/Simulink simulations. Furthermore, a reduced scale laboratory setup is built to demonstrate the practical viability and operational capability of the suggested inverter.

Keywords: Common ground (CG), transformerless inverter (TLI), selective harmonic elimination (SHE), multilevel selective harmonic elimination pulse-width modulation (MSHE–PWM), multilevel inverters (MLIs).

1 Introduction

A multilevel inverter (MLI) is a power electronic converter designed to generate a required ac voltage by combining multiple levels of dc voltages. MLIs are well suited for integrating distributed dc energy sources such as solar cells, fuel cells, and the rectified output of wind turbines with an existing ac grid. Transformerless MLIs are particularly attractive for these applications because they can achieve high power ratings. Moreover, the switching devices in MLIs experience lower voltage stress per switching event and can operate at higher efficiencies, since they switch at significantly lower frequencies compared to pulse width modulation controlled inverters. Three and five level rectifier inverter drive systems that employ various forms of multilevel pulse width modulation to control the switching of the rectifier and inverter sections have been investigated in [1–3]. However, the performance of MLIs is highly dependent on the modulation strategy employed. Here, a fundamental frequency switching scheme, rather than PWM, is considered because, as discussed earlier, it results in significantly lower switching losses. A critical issue in a fundamental frequency switching scheme is the determination of appropriate switching angles (or switching instants) such that the desired fundamental voltage component is generated while specific higher order harmonics are eliminated. In this context, a harmonic elimination technique is presented that enables the control of a MLIs to achieve efficient operation with low total harmonic distortion. Such a configuration is suitable for interfacing distributed dc energy sources with a main ac grid, as well as for serving as an interface for traction drive systems powered by fuel cells, batteries, or ultra-capacitors.

In grid-connected applications, harmonic distortion is a primary concern owing to the rapid integration of renewable energy sources into modern power systems. In this respect, SHE plays a important role in enhancing the overall power quality of microgrids by effectively mitigating unwanted harmonic distortions while preserving a high power factor [4]. SHE is regarded as an idle modulation strategy for high-power applications because of its greater harmonic suppression capability [5]. The basic idea behind SHE is to solve a set of nonlinear transcendental equations in order to determine the optimal switching angles that preserve the fundamental output voltage or current waveform while selectively eliminate specific harmonics [6]. Nevertheless these advantages, practical implementation of SHE–PWM is still challenge.

SHE–PWM techniques has largely been investigated for two-level and three-level inverter configurations [7–15]. A primary difficulty lies in deriving analytical solutions to the resulting nonlinear transcendental equations, which inherently contain trigonometric functions and possess various solution sets, complicating the solution process [8]. In the literature, various methods addressing this issue have been reported, including sequential homotopy-based computation [9], resultants theory [10], derivative-free iterative method [11], optimization-based search methods [12], Walsh function–based techniques [13, 14], and other optimal strategies [15], such as genetic algorithms (GAs) [16–20]. The cases involving symmetry constraints imposed by the problem formulation for bipolar waveforms were thoroughly examined in [21] where multiple solution sets where obtained in accordance with the prediction in [9] by using a minimization strategy in conjunction with a biased optimization search method [12]. Furthermore, even while symmetry was frequently assumed in earlier methods and solutions, this constraint can be relaxed, leading to other sets of solution and a more comprehensive formulation of the problem, as presented in [15, 22, 23]. More recently, the solution trajectories of the harmonic elimination problem were examined from a mathematical perspective in [16, 18].

With the advancement of multilevel converter technology, these concepts have been extended to multilevel configurations. In contrast, multilevel SHE–PWM schemes are commonly implemented using a unipolar modulation strategy, wherein the output waveform assumes positive, negative, and zero voltage levels, while phase-shifted modulation techniques are employed to achieve multilevel operation [23]. Alternative methods reported in the literature include methods that integrate harmonic elimination with programmed modulation techniques [24], as well as methods based on power equalization criteria among cascaded H-bridge multilevel converters to determine the optimal switching angles required for effective harmonic elimination.

In parallel to SHE-based approaches, carrier-based modulation techniques have also been widely investigated. The effective bandwidth of converters operating in parallel or cascaded configurations is extended using MPS-SPWM [25, 26]. Since then, MPS–SPWM has gained widespread adoption in the literature, as it facilitates the cancellation of selected harmonic components when appropriate phase shifts are applied among the multiple carrier signals within a single converter and across carriers associated with different converters.

In the existing literature a direct performance comparison with MSHE–PWM techniques remains insufficiently explored, despite the widespread adoption of MPS–SPWM for MLI applications. For instance, programmed SHE–PWM methods have been shown to provide enhanced gain and extended bandwidth, but these benefits have mostly been evaluated for two-level inverters [26]. Consequently, there is a lack of information available regarding the possibility of achieving comparable performance benefits in MLI configurations using MSHE–PWM. Moreover, there is a lack of complete documentation of switching angle sets for high-frequency multilevel waveforms across the entire range of modulation indices (MIs), with only a few addressing this aspect [27–29]. The GA and Particle Swarm Optimization (PSO) techniques are well documented in references [30–34], which provide a comprehensive foundation for understanding the application of these optimization methods in the relevant context.

Apart from modulation issues, the overall performance of the system is greatly influenced by the topology of the inverter. Many existing MLI topologies use large number of switching devices that enhances the complexity, losses and cost. Many new reduced-switch TLI topologies have been reported in [34–37]; however, their integration with advanced modulation strategies like MSHE–PWM remains limited.

Thus, there is a need of MLIs system that combines a reduced component count topology with an efficient harmonic elimination strategy and a robust optimization approach for determining switching angles.

To address these challenges, a novel reduced-switch CG-5L-TLI, along with an optimized MSHE–PWM control strategy is proposed in this paper. The main contributions of this work are summarized as follows:

• A reduced-switch CG-5L-TLI topology is proposed that effectively mitigates leakage current (LC) which also provides inherent voltage boosting.

• A symmetrically defined MSHE–PWM strategy is developed to produce a high-quality five-level output waveform with minimum harmonic distortion.

• A Bayesian optimization-based framework is introduced to accurately compute the optimal switching angles, addressing the limitations of conventional analytical and heuristic solution methods.

• The proposed technique enables effective harmonic elimination over a wide range of MIs, resulting in improved overall inverter performance. Experimental validation through a hardware prototype further demonstrates the feasibility and practical applicability of the proposed topology and control strategy.

The remainder of this paper is organized as follows. Section 2 proposes a reduced-switch CG-5L-TLI topology. Section 3 provides description of the symmetrically defined MSHE–PWM strategy for five-level output waveform. Section 4 describes the Bayesian optimization technique employed to determine the optimal switching angles. Section 5 discusses the simulation and experimental results. Finally, Section 6 concludes the paper.

Figure 1 Symmetrically defined five level MSHE–PWM waveform for a distribution ratio of 1/5 (m $=$ 5, k $=$ 1 and N $=$ k $+$ m $=$ 6).

2 Proposed CG Based Five-Level Reduced Switch TLI Topology

The proposed inverter topology aims to achieve full LC suppression while naturally facilitating boost in output voltage, rendering it suitable for both off-grid and on-grid load systems.

2.1 Suggested Inverter Configuration

Figure 2 demonstrates the suggested reduced switch CG-five level (CG-5L) TLI circuit configuration, which comprises of a dc input source (V_dc), seven IGBT switches (S₁–S₇), two switched capacitors (C₁ and C₂), a single diode (D₁) and a load at the output. The suggested inverter produces five output voltage levels, comprising of $\pm$V_dc, 0 and $\pm$2V_dc. As illustrated in Figure 2, the periodic charging of capacitor C₁ and C₂ is achieved through switches S₁ and S₅. In particular, capacitor C₁, in conjunction with the dc source and switches S₂, S₃, S₆, facilitates the production of a 2V_dc voltage level across the output terminal BN, thereby achieving voltage boosting.

The switching states of all the associated switches, the corresponding voltage levels at the output, and the discharging ($\downarrow$) or charging ($\uparrow$) behaviour of the capacitors across various operating modes are all summarized in Table 1. The switched capacitor mechanism inherently self-balances the voltages across capacitors C₂ and C₁ at 2V_dc and V_dc respectively. Consequently, no additional control technique or current/voltage sensors are needed to regulate the voltage of the capacitors.

Figure 2 Proposed reduced switch CG-5L TLI topology.

Table 1 Switching states and status of capacitor

								Capacitor Status
Modes	${\mathrm{S}}_1$	${\mathrm{S}}_2$	${\mathrm{S}}_3$	${\mathrm{S}}_4$	${\mathrm{S}}_5$	${\mathrm{S}}_6$	${\mathrm{S}}_7$	${\mathrm{C}}_1$	${\mathrm{C}}_2$	${\mathrm{V}}_{\mathrm{AB}}$
A	1	0	0	1	0	0	1	$\uparrow$	$\downarrow$	$-2V_{\mathrm{dc}}$
B	0	1	0	1	0	0	1	–	$\downarrow$	$-V_{\mathrm{dc}}$
C	0	1	1	0	1	0	1	$\downarrow$	$\uparrow$	$0$
D	1	0	1	0	0	1	0	$\uparrow$	–	$V_{\mathrm{dc}}$
E	0	1	1	0	1	1	0	$\downarrow$	$\uparrow$	$2V_{\mathrm{dc}}$

Figure 3 Modes of operation of the suggested reduced switch CG-5L-TLI topology, including capacitor charging path: (a) V_BN $=$ $-$2V_dc, (b) V_BN $=$ -V_dc, (c) V_BN $=$ 0, (d) V_BN $=$ V_dc, (e) V_BN $=$ 2V_dc.

2.2 Modes of Operation of Proposed Topology

The different modes of operation for the suggested inverter are demonstrated in Figure 3. In The figure the current conduction path to the load is highlighted in green colour and capacitor charging current is shown in red colour.

Mode A Operation: During mode A, the diode D₁ and switches S₁, S₄, S₇, are triggered into conduction, while the remaining switches are held in their OFF states. As shown in Figure 3(a), the conducting switches (S₁, S₄, S₇) establish a current path through which capacitor (C₂) discharges. Consequently, the voltage (V_BN) at the output terminal attains a magnitude of $-$2V_dc, and while capacitor C₁ simultaneously, gets charged to a voltage equal input dc source V_dc, driven by the switching action of S₁.

$$I<0,V_{BN}=-2V_{dc},V_{c1}=V_{dc}$$

(1)

Mode B Operation: During mode B, switches S₂, S₄, and S₇ are turned ON while the rest of the switches are held in their OFF states, as illustrated in Figure 3(b). The simultaneous conduction of these three switches S₂, S₄, and S₇ establishes a current path that discharges the capacitor C₂ towards the load terminal. As a result, the capacitor C₂ and dc input source appear in series combination, producing an output voltage (V_BN) equal to $-$V_dc.

$$I<0,V_{BN}=-2V_{dc}+V_{dc}=-V_{dc}$$

(2)

Mode C Operation: During Mode C, switches S₂, S₃, S₅, and S₇ are brought into conduction while the rest are held in their OFF states, as illustrated in Figure 3(c). The conduction of these switches establishes a path through which capacitor C₁ discharges into capacitor C₂, driving the output voltage (V_BN) to zero

$$I=0,V_{BN}=0,V_{c2}=2V_{dc}$$

(3)

Mode D Operation: During Mode D, switches S₁, S₃, S₅, and diode D₁ are triggered into conduction, while the remaining switches are held in their OFF states, as illustrated in Figure 3(d). Through the switching action of S₁, capacitor C₁ gets charged to V_dc. At the same time, the input voltage source establishes a direct connection to the output terminal via diode D₁ and switches S₃ and S₅, producing an output voltage (V_BN) equals to V_dc.

$$I>0,V_{BN}=V_{dc},V_{c1}=V_{dc},$$

(4)

Mode E Operation: During this mode, switches S₂, S₃, S₅, and S₆ are brought into conduction, while all remaining switches are held in their OFF states, as depicted in Figure 3(e). In this mode, capacitor C₁ undergoes discharging, while capacitor C₂ gets connected in parallel across the series combination of V_dc and V_C1 via switch S₅, charging it to 2V_dc. Furthermore, the V_BN at the output attains a magnitude of 2V_dc, which corresponds to the sum of the input voltage source and the voltage across capacitor C₁.

$$I>0,V_{BN}=V_{dc}+V_{c1},V_{c2}=V_{dc}$$

(5)

3 MSHE–PWM Strategy for Five-Level Output Waveform

The symmetrical structured MSHE–PWM technique for five-level output waveform proposed in paper [30] is based on the line-to-neutral voltage, as illustrated in Figure 1. In this modulation strategy, the output voltage is synthesized using five symmetrically distributed voltage levels, namely $\pm$2 p.u., 0, $\pm$1 p.u., within one fundamental cycle. The total number of switching transitions defined within one quarter of the waveform period is denoted by N, which may be selected as either an odd or an even integer, subject to specific structural constraints. In this paper, N is chosen as an even integer. Let k denote the number of switching transitions between the 0 p.u. and 1 p.u. voltage levels. Since the first transition occurs from 0 p.u. to 1 p.u., k is necessarily odd. Let m represent the remaining switching transitions between the 1 p.u. and 2 p.u. voltage levels. This number can be either even or odd depending upon N. For the case where N is even and k is odd, m is also constrained to be odd, thereby restricting the total number of switching transitions N to an even value.

$$k/m=1,3,5\mathrm{\dots }N$$

(6)

For a given modulation ratio (k/m), the method requires the formulation of a specific set of transcendental equations derived from the Fourier series representation of the output voltage to selectively eliminate targeted harmonic components. The approach adheres the classical SHE–PWM principle, whereby the switching angles are computed to simultaneously regulate the fundamental output component and suppress targeted harmonics. Although this formulation was originally developed for a five-level multilevel waveform, preserving both half-wave and quarter-wave symmetries, the same theoretical framework is adopted in this paper. Accordingly, once the switching angles are obtained within the interval 0 to $\pi /2$, the remaining angles $({\alpha }_1,{\alpha }_2,{\alpha }_3,{\alpha }_4,{\alpha }_5,{\alpha }_6\mathrm{\dots }{\alpha }_{\mathrm{i}},\mathrm{i}=\mathrm{N})$ over the fundamental period are determined using half wave symmetry. With N switching angles employed, up to (N $-$ 1) harmonic components can theoretically be eliminated, provided that valid solutions to the resulting equations exist. As depicted in Figure 4, multiple switching transitions can be realized for same set of switching angles.

In the generalized case, the harmonic elimination problem is represented by the following system of equations, which must be solved to determine the corresponding switching angles.

$$M=\sum _{i=1}^N((-1^{i-1})\cos ({\alpha }_i))+\sum _{i=k+1}^{k+m}((-1^{i-(1+k)})\cos ({\alpha }_i))$$	(7)
$$0=\sum _{i=1}^N((-1^{i-1})\cos (3{\alpha }_i))+\sum _{i=k+1}^{k+m}((-1^{i-(1+k)})\cos (3{\alpha }_i))$$	(8)
$$0=\sum _{i=1}^N((-1^{i-1})\cos (n{\alpha }_i))+\sum _{i=k+1}^{k+m}((-1^{i-(1+k)})\cos (n{\alpha }_i))$$	(9)

Where

$$\mathrm{n}=3\mathrm{N}-1$$

$$0\le \mathrm{M}\le 2$$

Figure 4 Switching Transitions (a) k $=$ 1/5 case, (b) k $=$ 5/3 case, (c) k $=$ 3/5 case.

If the amplitude of the fundamental component to be produced is V₁, then

$$V_1=\frac{4M}{\pi }$$

(10)

Where M $=$ 2, the square-waveform of 2 p.u. amplitude yields a maximum value at fundamental frequency value of 8/$\pi$ per unit. The Bayesian minimization technique is applied to solve the transcendental equations describing the Fourier series coefficient. The constraints imposed on the sought solutions are as follows:

$${\alpha }_1,{\alpha }_2,{\alpha }_3,{\alpha }_4,{\alpha }_5,{\alpha }_6\mathrm{\dots }{\alpha }_{\mathrm{i}}<\pi /2$$

4 Bayesian Optimization–Based Selective Harmonic Elimination for a Transformerless Five-Level Inverter

4.1 Bayesian Optimization–Based SHE Methodology

SHE is a widely adopted modulation technique for MLIs, where switching angles are chosen such that specific low-order harmonics are eliminated while maintaining the desired fundamental component. In transformerless five-level inverters, this problem becomes more challenging due to stringent harmonic and leakage-current constraints. The nonlinear relationship between switching angles and harmonic magnitudes results in a highly nonconvex optimization problem that is difficult to solve using classical numerical methods.

For a five-level inverter utilizing eight or six switching angles in the first quarter cycle, these switching angles uniquely define the output voltage waveform and corresponding harmonic spectrum. Since the harmonic amplitudes must be evaluated using Fourier analysis or simulation, analytical gradients of the objective function with respect to switching angles are unavailable. Consequently, the SHE problem is reformulated as a black-box, derivative-free optimization problem.

In this work, Bayesian optimization is utilized because of its well-established effectiveness in addressing computationally expensive black-box optimization problems. In contrast to population-based heuristic methods, Bayesian optimization develops a probabilistic surrogate model of the objective function, which is utilized to intelligently direct the search toward optimal switching angles.

4.2 Objective Function Formulation

The objective function is constructed to penalize both the deviation of the fundamental component from its reference value and the magnitudes of selected low-order harmonics. Minimization of this objective corresponds to a valid SHE solution. This formulation avoids explicit solution of transcendental equations and allows near-optimal solutions to be accepted when exact harmonic elimination is infeasible.

Let the switching-angle vector be defined as:

$$A=[{\alpha }_1,{\alpha }_2,{\alpha }_3,{\alpha }_4,{\alpha }_5,{\alpha }_6]$$

(11)

subject to the constraints

$${\alpha }_1,{\alpha }_2,{\alpha }_3,{\alpha }_4,{\alpha }_5,{\alpha }_6\mathrm{\dots }{\alpha }_{\mathrm{i}}<\pi /2$$

The modulation index (MI) constraint is enforced using the generalized fundamental expression given in (11), which has already been derived and discussed in the preceding section. Selective elimination of low-order harmonics is achieved by enforcing the classical SHE harmonic conditions [1, 4]:

$$\sum _{i=1}^6\cos (n{\alpha }_i)=0,nϵ\{3,5,7,9,11\}$$

(12)

Instead of explicitly solving the resulting system of nonlinear transcendental equations, the SHE problem is reformulated as an optimization problem by minimizing the squared residuals of the fundamental and harmonic equations, as commonly adopted in modern SHE formulations [4]. Accordingly, the objective function is defined as:

$J(\alpha )$	$={\left({\displaystyle \sum _{i=1}^N}((-1^{i-1})\cos ({\alpha }_i))+{\displaystyle \sum _{i=k+1}^{k+m}}((-1^{i-(1+k)})\cos ({\alpha }_i))-M\right)}^2$
	$+{\displaystyle \sum _H}{\left({\displaystyle \sum _{i=1}^6}\cos (n{\alpha }_i)\right)}^2$	(13)

Where H $=$ {3, 5, 7, 9, 11} denotes the set of harmonics to be eliminated. Minimization of J($\alpha$) is mathematically equivalent to solving the original SHE equations when an exact solution exists and provides the best achievable approximation otherwise.

4.3 Gaussian Process Surrogate Modelling

In Bayesian optimization, the objective function defined in (13) is treated as an expensive black-box function and is modelled using a Gaussian Process ($G\rho$) surrogate. Based on a finite set of evaluated switching-angle samples, the $G\rho$ provides a probabilistic prediction of the objective function at unexplored points. Specifically, it yields both the expected value and the associated uncertainty. A $G\rho$ defines a distribution over functions and is fully characterized by a mean function and a covariance function, expressed as:

$$J(\alpha )\sim G\rho (\mu (\alpha ),k(\alpha ,{\alpha }^{\prime }))$$

A squared exponential kernel is employed in this work due to its smoothness and generalization capability, and is given by [5, 6]:

$$k(\alpha ,{\alpha }^{\prime })={\sigma }_f^2\mathit{exp}{(\alpha -{\alpha }^{\prime })}^T{\mathrm{\Lambda }}^{-1}(\alpha -{\alpha }^{\prime })$$

(14)

Where ${\sigma }_f^2$ the signal variance and $\mathrm{\Lambda }$ is a diagonal matrix of length-scale parameter.

Given a set of evaluated switching-angle samples $\{\alpha \mathrm{i},\mathrm{Ji}\}$, the $G\rho$ provides a predictive distribution for any unexplored point ${\alpha }^{\ast }$, characterized by a mean ${\mu }^{\ast }$ and variance ${\sigma }^{2\ast }$. This probabilistic prediction captures both the expected objective value and the associated uncertainty.

This probabilistic modelling approach proves advantageous for SHE, as it allows the optimizer to locate promising regions within the switching-angle space while simultaneously quantifying confidence in the predictions. Regions of high uncertainty are systematically explored to avoid overlooking feasible solutions, while regions associated with low predicted cost are exploited to refine the optimal switching angles. The probabilistic surrogate model provides both the predicted objective value and the associated uncertainty estimate, which proves particularly advantageous in addressing the highly nonlinear characteristics of the SHE problem.

4.4 Acquisition Function and Switching-Angle Selection

An acquisition function is employed to determine the next switching-angle candidate to be evaluated. In this work, the Expected Improvement (EI) criterion is adopted. EI quantifies the expected reduction in the objective function relative to the best solution obtained so far.

The EI acquisition function is employed to direct the selection of new switching-angle candidates. EI is defined as:

$$EI(\alpha )=E[\mathit{max}(0,J_{\mathit{min}}-J(\alpha ))]$$

(15)

Where, J_min denotes the minimum objective value. For a Gaussian predictive with standard distribution $\sigma$ and mean $\mu$, the EI function can be expressed analytically as [6]:

$$EI(\alpha )=(J_{\mathit{min}}-\mu )\phi (z)+\sigma \mathrm{\varnothing }(z),z=\frac{J_{\mathit{min}}-\mu }{\sigma }$$

(16)

Where, $\phi (z)$ and $\mathrm{\varnothing }(z)$ denote the cumulative distribution function and probability density function of the standard normal distribution, respectively.

By maximizing (15), the Bayesian optimization framework balances exploitation and exploration in a mathematically principled manner, yielding smooth and continuous switching-angle trajectories with respect to the MI, which is highly desirable for practical SHE implementation. By applying Bayesian optimization, the switching angles corresponding to various MIs are tabulated in Tables 2 and 3. Table 2 presents eight switching angles (${\alpha }_1$ to ${\alpha }_8$) for eight switching transitions, while Table 3 presents six switching angles (${\alpha }_1$ to ${\alpha }_6$) for six switching transitions. The flow chart for the Bayesian optimisation technique is illustrated below in Figure 5.

Table 2 Calculated notch angles (${\alpha }_1$ to ${\alpha }_8$) corresponding to various MIs for eight switching transitions

MI	${\alpha }_1$	${\alpha }_2$	${\alpha }_3$	${\alpha }_4$	${\alpha }_5$	${\alpha }_6$	${\alpha }_7$	${\alpha }_8$
0.4	0.199	0.27135	0.4235	0.59214	0.66939	1.22076	1.27805	1.53137
0.5	0.240	0.37182	0.48678	1.01941	1.11495	1.32337	1.47833	1.57033
0.6	0.232	0.3584	0.4689	0.96995	1.05764	1.23741	1.37052	1.50217
0.7	0.173	0.2624	0.37347	0.83762	0.95661	1.10764	1.33501	1.42679
0.8	0.203	0.33610	0.3975	0.66544	0.74402	0.88787	1.08239	1.13769

Table 3 Calculated notch angles (${\alpha }_1$ to ${\alpha }_6$) corresponding to various MIs for six switching transitions

MI	${\alpha }_1$	${\alpha }_2$	${\alpha }_3$	${\alpha }_4$	${\alpha }_5$	${\alpha }_6$
0.4833	0.3022	0.47654	0.61443	1.31872	1.40361	1.5704
0.50	0.29133	0.45828	0.59021	1.2285	1.30108	1.53186
0.5518	0.24367	0.37513	0.50455	1.11519	1.23017	1.48842
0.5973	0.00877	0.16983	0.407	1.05639	1.21706	1.4542
0.8012	0.24608	0.60947	0.65725	0.70821	0.91378	1.03325

Figure 5 Flowchart illustrating working if Bayesian optimization algorithm.

Particle Swarm Optimization and Genetic Algorithms have been widely used for SHE due to their simplicity and flexibility. However, these methods rely on population-based random search mechanisms, which often require a large number of function evaluations and careful tuning of algorithmic parameters.

In contrast, Bayesian optimization uses a probabilistic surrogate model to guide the search process. As a result, it converges with significantly fewer objective-function evaluations. Moreover, PSO and GA are stochastic in nature and may produce different solutions in different runs, whereas Bayesian optimization is deterministic for a given kernel and initialization.

A notable benefit of Bayesian optimization is the continuity of the resulting switching-angle trajectories. Population-based methods often exhibit discontinuities in angle trajectories as the MI varies, which complicates real-time implementation. Bayesian optimization inherently yields smooth and continuous trajectories, rendering it more appropriate for practical SHE applications.

The Bayesian optimization framework offers a systematic and efficient methodology for SHE switching-angle computation. By integrating probabilistic modelling with intelligent sampling, it overcomes the limitations of classical numerical solvers and population-based heuristics. The method is particularly suitable for transformerless MLIs, where harmonic performance, repeatability, and computational efficiency are critical importance.

Figure 6 show the optimal switching angles obtained using the Bayesian optimization technique plotted against different values of MI for the k $=$ 3/5 case, corresponding to six and eight switching transitions, respectively.

From the figures, it is evident that the optimum solution set in both cases, comprising the respective switching angles, converges to lower values as the MI increases. The switching angles ${\alpha }_1$, ${\alpha }_2$, ${\alpha }_3$, ${\alpha }_4$, ${\alpha }_5$, ${\alpha }_6$, ${\alpha }_7$, and ${\alpha }_8$ represent the optimal notch angles computed at each value of the MI.

Figure 7 illustrates the optimal switching angles computed for various MIs in the k $=$ 3/3 case, while Figure 8 presents the corresponding harmonic profiles at different MIs.

Similarly, Figure 10 demonstrates the optimal switching angles computed for various MIs in the k $=$ 5/3 case, While Figure 11 shows the corresponding harmonic profile at different MIs.

Figure 6 Switching angle vs MI graph for 3/5 case for eight switching transitions.

Figure 7 Switching angle vs MI graph index for 3/3 case.

Figure 8 Harmonics profile at different MIs: M${}_1{}^{}=0.4832$, M${}_2{}^{}=0.5031$ and M${}_3{}^{}=0.8011$ for 3/3 case.

Figure 9 Switching angle vs MI graph for 5/3 case.

Figure 10 Harmonics profile at different MIs: M${}_1{}^{}=0.44$, M${}_2{}^{}=0.48$, M${}_3{}^{}=0.50$ for 5/3 case.

As observed from the Figures 9 and 10, the fundamental component dominates with the highest magnitude in all cases. The effectiveness of the adopted switching strategy is seen clearly in the notable suppression of the lower-order odd harmonics, particularly in the SHE cases. The magnitude of higher-order harmonics shows progressive reduction which indicates distortion at higher harmonic orders is diminished. Overall, increasing the number of switching transitions gives a significant improvement in harmonic performance, illustrating the benefits of higher-order switching patterns in producing a cleaner spectrum output voltage.

5 Simulation and Experimental Results

To validate the performance of the suggested TLI topology, both simulation and experimental analyses are carried out. Furthermore, a reduced scale laboratory setup is built to demonstrate the practical viability and operational capability of the suggested inverter.. The key performance aspects evaluated include validation under various load conditions and generation of a high-quality five-level output waveform with reduced harmonic distortion. Table 4 summarizes the key parameters employed in the simulation and experimental studies.

Table 4 Experimental and simulation parameters

Parameters	Experimental	Simulation
Dc input supply	20V	20 V
Output frequency	50 Hz	50 Hz
Output voltage	32.05V (RMS)	32.05 V (RMS)
Capacitors (C1 and C2)	C${}_1{}^{}=1000$ $\mu$F	C${}_1{}^{}=1000$ $\mu$F
	C${}_2{}^{}=1500$ $\mu$F	C${}_2{}^{}=1500$ $\mu$F
IGBT	FG25N120 (1200V/50A)	–
Diode	25D40R (400/25)	–
OPAL-RT 4510	OPAL-RT 4510	–

5.1 Simulation Results

A Five-level SHE PWM output waveform with eight or six switching angle sought within the quarter period is synthesized by an TLI voltage source inverter. In the MATLAB simulation, different switching patterns are adopted to obtain the high quality output voltage waveform. The switching patterns employed are k $=$ 1/5, k $=$ 3/5, and k $=$ 5/3. The analysis is carried out at different MIs, namely MI $=$ 0.8, 0.55, and 0.48. The calculated switching angles corresponding to various MIs for eight and six switching transitions are presented in Tables 2 and 3, respectively, and are employed in the simulation. The TLI is supplied by a 20 V dc source and operates at a fundamental frequency of 50 Hz.

Figure 11 illustrates the output voltage waveform in which eight switching transitions (k $=$ 5/3) are achieved within a quarter period of the waveform. At MI $=$ 0.80, the expected RMS value of the fundamental component of the output voltage is 26.05 V. At the MI $=$ 0.80, the proposed topology is simulated under different load conditions, including inductive, resistive and dynamic loads.

Figure 11 Waveform of output voltage with MI $=$ 0.8 and k $=$ 5/3.

Figure 12 Waveforms of current and voltage for R-Load.

Figure 12 depicts the waveform of the output current and voltage corresponding to a load that is resistive in nature (R $=$ 150 $\mathrm{\Omega }$). Since the load is resistive, hence no phase displacement exists between the current and voltage waveforms. Figure 13 depicts the inverter behaviour for an RL load with a visible phase displacement existing among the current and voltage waveforms because of inductance. The value of R used is 150 $\mathrm{\Omega }$ and the value of L used is 150 mH. Figure 14 presents the inverter behaviour under dynamic load conditions, with the load transitioning from Z₁ comprising resistance of 200 $\mathrm{\Omega }$ and inductance of 200 mH to Z₂, comprising a resistance of 150 $\mathrm{\Omega }$ to inductance of 150 mH. Despite the phase displacement introduced by the inductive component, the output waveforms remain well-regulated and stable, reflecting the adaptability and robustness of the proposed topology to varying load profiles.

Figure 13 Waveforms of current and voltage for RL-Load.

Figure 14 Waveforms of current and voltage during dynamic RL-load transition.

The output voltage waveforms corresponding to six (k $=$ 1/5) switching transitions sought within a quarter period of the waveform are shown in Figure 15 and Figure 16 at MI $=$ 0.80 and MI $=$ 0.60, respectively. Furthermore, an additional switching pattern is adopted, as illustrated in Figure 17. In this switching pattern, eight (k $=$ 3/5) switching transitions are achieved within a quarter period of the waveform at a MI $=$ 0.50. The leakage current is shown in Figure 18.

Figure 15 Waveform of output voltage with MI $=$ 0.8 and k $=$ 1/5.

Figure 16 Waveform of output voltage with MI $=$ 0.55 and k $=$ 1/5.

Figure 17 Waveform of output voltage with MI $=$ 0.488 and k $=$ 3/5.

Figure 18 Waveform of leakage current.

5.2 Experimental Results

Besides simulation analysis, the practical performance of the proposed TLI topology is also evaluated on a scaled-down laboratory setup, and the parameters used in the experimental setup are listed in Table 3. Figure 19 depicts the experimental test setup. The prototype comprises a dc supply, a diode (25D40R), seven IGBT switches (FGA25N120), seven gate drivers (TLP250), two capacitors (C${}_1{}^{}=1000$ $\mu$F and C${}_2{}^{}=1500$ $\mu$F) and RL load. The other key instruments used are PQ analyser, DSO and OPAL-RT. The OPAL-RT 4510 generating gate pulses which are amplified by gate driver circuits hence acts as main controller. The input to the inverter is provided by 30V dc supply, and the system is operated at a switching frequency of 50 Hz. The performance is evaluated under various switching transition and load conditions, where different switching patterns are adopted to obtain the high quality output voltage waveform.

Figure 19 Hardware setup of proposed topology.

Figure 20(a) shows the output voltage generated using the NLC technique, and Figure 20(b) shows the corresponding voltage THD. The voltage THD at a MI of 0.80 is 35.8%. The predominant harmonics present are odd harmonics, namely the 3rd, 5th, 7th, 9th, 11th, 15th, and 17th orders. Additionally, from the figure it is observed that twice voltage boosting is achieved, as the output voltage levels of 40 V is obtained corresponding to an input voltage of 20 V.

Figure 20 Waveform of output voltage and harmonic analysis using NLC technique (a) Output voltage with MI $=$ 0.8, (b) Voltage THD at with MI $=$ 0.8.

Figure 21 Waveform of output voltage and harmonic analysis using SHE technique. (a) Output voltage with MI $=$ 0.8 and k $=$ 1/5, (b) Voltage THD at k $=$ 1/5 and MI $=$ 0.8.

Figure 21(a) illustrates the output voltage waveform in which six (k $=$ 1/5) switching transitions are sought within a quarter period of the waveform. The value of switching angles used in this case against MI $=$ 0.8 are: ${\alpha }_1=0.24608$, ${\alpha }_2=0.60947$, ${\alpha }_3=0.65725$, ${\alpha }_4=0.70821$, ${\alpha }_5=0.91378$, ${\alpha }_6=1.03325$. From Figure 21(a) it is depicted that the five switching transition are performed between 20 V and 40 V voltage levels and the remaining one is done between 0 V and 20 V voltage level. The value of Figure 21(b) shows the corresponding voltage THD at MI $=$ 0.8, from which it is observed that five odd harmonics, corresponding to harmonic orders 3rd, 5th, 7th, 9th, and 11th, are successfully eliminated. This results in a reduced THD of 22.4% at the same MI employed for the NLC technique. The rms value of fundamental component is 26.05 V, which comprises of 94.7% of total voltage value. Figure 22 depicts the inverter behaviour for RL load comprising a resistance of 150 $\mathrm{\Omega }$ and an inductance of 150 mH, where a visible phase displacement between the current and voltage waveforms is observed owing to the inductive component. Figure 23 presents the inverter performance under a dynamic load condition, in which the load transitions from Z₁, comprising a resistance of 150 $\mathrm{\Omega }$ and an inductance of 150 mH, to Z₂, comprising resistance of 200 $\mathrm{\Omega }$ and an inductance of 200 mH.

Figure 22 Waveform of current and voltage for RL load.

Figure 23 Waveforms of current and voltage during dynamic RL-load transition.

Similarly, Figure 24(a) illustrates the output voltage waveform in which eight (k $=$ 5/3) switching transitions are sought within a quarter period of the waveform. The value of eight switching angles used in this case against MI $=$ 0.8 are: ${\alpha }_1=0.203266$, ${\alpha }_2=0.336109$, ${\alpha }_3=0.397599$, ${\alpha }_4=0.66544$, ${\alpha }_5=0.744024$, ${\alpha }_6=0.887872$, ${\alpha }_7=1.082397$, ${\alpha }_8=1.13769$. From Figure 24(a) it is depicted that the three switching transition are performed between 20 V and 40 V voltage levels and the remaining five is done between 0 V and 20 V voltage level.

Figure 24 Waveform of output voltage and harmonic analysis using SHE technique (a) Output voltage with MI $=$ 0.8 and k $=$ 5/3, (b) Voltage THD at k $=$ 5/3 and MI $=$ 0.8.

Figure 25 Waveform of current and voltage for RL-Load.

Figure 24(b) depicts the voltage THD at MI $=$ 0.8. From the FFT analysis, it is observed that eight harmonics, corresponding to harmonic orders 3rd, 5th, 7th, 9th, 11th, 13th, and 15th, are eliminated. This further reduces the THD to 16.1%. The rms value of fundamental component is 26.05 V, which comprises of 94.7 % of total voltage value. Additionally, for the eight (k $=$ 5/3) switching transitions, the inverter performance under both RL and dynamic load conditions was evaluated. Figure 25 presents the inverter behaviour for an RL load. The value of resistance used is 150 $\mathrm{\Omega }$ and value of an inductance is 150 mH. Figure 26 presents the inverter performance under a dynamic load condition, in which the load transitions from Z₁, comprising a resistance of 150 $\mathrm{\Omega }$ and an inductance of 150 mH, to Z₂, comprising resistance of 200 $\mathrm{\Omega }$ and an inductance of 200 mH.

Figure 27 illustrates the output voltage waveform corresponding to eight (k $=$ 3/5) switching transitions within a quarter period of the waveform. In this case, MI equal to 0.5 is employed. The value of eight switching angles used in this case against MI $=$ 0.488 are: ${\alpha }_1=0.240828$, ${\alpha }_2=0.37182$, ${\alpha }_3=0.48678$, ${\alpha }_4=1.114954$, ${\alpha }_5=1.323377$, ${\alpha }_6=1.478339$, ${\alpha }_7=1.082397$, ${\alpha }_8=1.570333$. From Figure 27 it is depicted that the five switching transition are performed between 20 V and 40 V voltage levels and the remaining three is done between 0 V and 20 V voltage level.

Figure 26 Waveforms of current and voltage during the dynamic RL-Load.

Figure 27 Waveform of output voltage with MI $=$ 0.488 and k $=$ 3/5.

6 Conclusion

In this paper, a CG-5L TLI topology with reduced-switch is suggested and evaluated under various load conditions. Since the CG configuration is adopted, leakage current is completely eliminated. Additionally, voltage boosting is achieved without the need for an additional boost converter.

This paper implemented a symmetrically defined MSHE–PWM technique to generate a high-quality five-level output waveform with reduced harmonic distortion. The switching angles are determined using a Bayesian optimization method, resulting in an efficient procedure for computing the switching angles. It is demonstrated that the implemented method enables the calculation of switching angles over the entire range of MIs by employing a distribution ratio and systematic solution search. The simulation and experimental results are presented to validate the theoretical analysis.

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Biographies

Tajamul Hayat Parray was born in Srinagar, J&K, India, in 1996. He received the B.Tech. degree from the University of Kashmir Hazratbal, Srinagar, Zakura campus in 2018 and the M.Tech. degree in power electronics and electrical drives from the National Institute of Technology Srinagar in 2022. He is currently working toward the Ph.D. degree in the Department of Electrical, National Institute of Technology Srinagar. His current research interests include multilevel inverters, grid-connected PV inverters, transformerless inverters, dc-dc switched capacitors and DC converters, and electrical machine drives.

Salman Ahmad received the B.Tech degree in Electrical Engineering from Aligarh Muslim University, Aligarh, India, in 2010 and M.Tech degree from Indian Institute of Technology, Roorkee, India, in 2012, the Ph.D. Degree from Aligarh Muslim University, India in 2020. He is currently an Assistant Professor of electrical engineering with Islamic University of Science and Technology Awantipora, India. He has published more than 25 technical papers in different journals and conference proceedings and contributed three book chapters in edited books published by Elsevier, USA and Springer Nature, Singapore. He received 4 research grants from various government agencies. His current research interests include Power converters, PWM techniques, multilevel and multiphase converter, variable speed drives and renewable energy systems.

Farhad Ilahi Bakhsh (Senior Member, IEEE) received B. Tech degree in Electrical Engineering and M. Tech. degree in Power Systems & Drives from Aligarh Muslim University (AMU), Aligarh, India in 2010 and 2012, respectively. Then he pursued Ph.D. from Indian Institute of Technology Roorkee, India in 2017. During his Ph.D. he developed a new method for grid integration for wind energy generation system which has been recognized worldwide. He developed an automatic solar tracking system which has been appreciated by IEEE India Council, Centre for Embedded Product Design, Centre for Electronics Design and Technology, Netaji Subhas Institute of Technology in association with IEEE Delhi Section & IEEE CAS, Bangalore Chapter. Currently he is serving as Assistant Professor in Department of Electrical Engineering, National Institute of Technology Srinagar, Jammu & Kashmir, India. He is founder and Counselor of IEEE Student Branch, NIT Srinagar.

He has won “10 for 10 Typhoon HIL Award” from Switzerland, Europe. He delivered a number of Keynote talks, Invited talks and Expert Lectures at National and International level in conferences, workshops, STC, etc. He has more than 100 published papers in Scopus or Web of Science based International reputed Journals and Conferences. He has also published many books in Springer, Wiley, IEEE, Scrivener Publishing and River Publishers with more than 20 book chapters. He has been enlightened with “Award of Excellence in Research” by VALLWAY International. Many times, he got best paper awards in International reputed conferences. Moreover, he has Indian, Australian and South African granted patents in his credit. Recently, he has received “Typhoon HIL Best Paper Award Europe 2025”. In this award, they have received a Typhoon HIL 604 Emulator which costs around 50 lakhs INR. He served as Lead Guest Editor in IET Generation, Transmission and Distribution Journal; Lead Guest Editor in IET Power Electronics Journal; Guest Editor in IET Renewable Power Generation Journal; Guest Editor in Frontiers in Energy Research; Guest Editor in Renewable Energy Focus, Elsevier; Guest Editor in Recent Advances in Electrical & Electronic Engineering; and Associate Editor of e-Prime-Advances in Electrical Engineering, Electronics and Energy, Elsevier. His research area of interests includes Performance Analysis and new applications of Variable Frequency Transformer, Application of Power Electronics & Drives in Renewable Energy Systems (Solar & Wind), Multilevel Converters, Multilevel DC-DC DAB Converters, Alternate Energy Vehicles (Electric/Hybrid) and Multi-phase Drives.

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