Optimized Control of a Five-Level Transformerless Inverter Using Bayesian Techniques
DOI:
https://doi.org/10.13052/dgaej2156-3306.4149Keywords:
Common ground (CG), transformerless inverter (TLI), selective harmonic elimination (SHE), multilevel selective harmonic elimination pulse-width modulation (MSHE–PWM), multilevel inverters (MLIs)Abstract
Common-ground (CG) based transformerless multilevel inverters (MLIs) are well-suited for grid-connected photovoltaic (PV) applications, because of their ability to eliminate leakage current and high efficiency. In this paper a reduced-switch CG five-level transformerless inverter (CG-5L-TLI) is presented that uses a dc source, one diode, seven switches and two capacitors. The proposed topology inherently eliminates leakage current, offers boosting of voltage without the need for any extra boost converter, and also ensures voltage balancing of the capacitors without requiring auxiliary control circuits. To improve the quality of output waveform, a selective harmonic elimination (SHE) strategy is employed, with optimal switching angles determined using a Bayesian optimization approach for the multilevel SHE-PWM scheme. The performance and effectiveness of the suggested system are validated via detailed MATLAB/Simulink simulations. Furthermore, a reduced scale laboratory setup is built to demonstrate the practical viability and operational capability of the suggested inverter.
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Jih-Sheng Lai and Fang Zheng Peng, “Multilevel converters-a new breed of power converters,” in IEEE Transactions on Industry Applications, vol. 32, no. 3, pp. 509–517, May–June 1996.
R. W. Menzies, P. Steimer and J. K. Steinke, “Five level GTO inverters for large induction motor drives,” Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting, Toronto, ON, Canada, 1993, pp. 595–601 vol. 1.
Jie Zhang, “High performance control of a three-level IGBT inverter fed AC drive,” IAS ’95. Conference Record of the 1995 IEEE Industry Applications Conference Thirtieth IAS Annual Meeting, Orlando, FL, USA, 1995, pp. 22–28 vol. 1.
Mohammed LA, Husain TA, Ibraheem AMT. Implementation of SHE-PWM technique for single-phase inverter based on Arduino. Int J Electr Comput Eng. 2021;11(4):2907.
Ghoudelbourk S, Azar AT, Dib D, Omeiri A. Selective harmonic elimination strategy in multilevel inverters for grid-connected photovoltaic systems. Int J Adv Intell Paradigms. 2020;15(3):317.
M. S. A. Dahidah, G. Konstantinou and V. G. Agelidis, “A Review of Multilevel Selective Harmonic Elimination PWM: Formulations, Solving Algorithms, Implementation and Applications,” in IEEE Transactions on Power Electronics, vol. 30, no. 8, pp. 4091–4106, Aug. 2015
H. S. Patel and R. G. Hoft, “Generalized Techniques of Harmonic Elimination and Voltage Control in Thyristor Inverters: Part I–Harmonic Elimination,” in IEEE Transactions on Industry Applications, vol. IA-9, no. 3, pp. 310–317, May 1973.
T. Kato, “Precise PWM Waveform Analysis of Inverter for Selected Harmonic Elimination,” 1986 Annual Meeting Industry Applications Society, Denver, CO, USA, 1986, pp. 611-616.
T. Kato, “Sequential homotopy-based computation of multiple solutions for selected harmonic elimination in PWM inverters,” in IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 46, no. 5, pp. 586–593, May 1999,
J. N. Chiasson, L. M. Tolbert, K. J. McKenzie and Zhong Du, “A complete solution to the harmonic elimination problem,” in IEEE Transactions on Power Electronics, vol. 19, no. 2, pp. 491–499, March 2004
Salman Ahmad, Mohammed Meraj, Atif Iqbal, Imtiaz Ashraf, Selective harmonics elimination in multilevel inverter by a derivative-free iterative method under varying voltage condition, ISA Transactions, Volume 92, 2019, Pages 241–256, ISSN 0019-0578.
V. G. Agelidis, A. Balouktsis and I. Balouktsis, “On applying a minimization technique to the harmonic elimination PWM control: the bipolar waveform,” in IEEE Power Electronics Letters, vol. 2, no. 2, pp. 41–44, June 2004, doi: 10.1109/LPEL.2004.831157.
F. Swift and A. Kamberis, “A new Walsh domain technique of harmonic elimination and voltage control in pulse-width modulated inverters,” in IEEE Transactions on Power Electronics, vol. 8, no. 2, pp. 170–185, April 1993.
Tsorng-Juu Liang, R. M. O’Connell and R. G. Hoft, “Inverter harmonic reduction using Walsh function harmonic elimination method,” in IEEE Transactions on Power Electronics, vol. 12, no. 6, pp. 971–982, Nov. 1997.
J. R. Wells, B. M. Nee, P. L. Chapman and P. T. Krein, “Optimal harmonic elimination control,” 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551), Aachen, Germany, 2004, pp. 4214–4219, Vol. 6.
Ahmad S, Iqbal A, Ashraf I, Ganie ZA. Harmonics minimization in multilevel inverter by continuous mode ACO technique. In: Metaheuristic and Evolutionary Computation: Algorithms and Applications. Singapore: Springer; 2021.
B. Ozpineci, L. M. Tolbert and J. N. Chiasson, “Harmonic optimization of multilevel converters using genetic algorithms,” 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551), Aachen, Germany, 2004, pp. 3911–3916 Vol. 5.
M. S. A. Dahidah and V. G. Agelidis, “A Hybrid Genetic Algorithm for Selective Harmonic Elimination Control of a Multilevel Inverter with Non-Equal DC Sources,” 2005 International Conference on Power Electronics and Drives Systems, Kuala Lumpur, Malaysia, 2005, pp. 1205–1210.
M. Kumari et al., “Genetic Algorithm based SHE-PWM for 1-ø and 3-ø Voltage Source Inverters,” 2019 International Conference on Power Electronics, Control and Automation (ICPECA), New Delhi, India, 2019, pp. 1–6,
V. G. Agelidis, A. Balouktsis, I. Balouktsis and C. Cossar, “Multiple sets of solutions for harmonic elimination PWM bipolar waveforms: analysis and experimental verification,” in IEEE Transactions on Power Electronics, vol. 21, no. 2, pp. 415–421, March 2006.
J. R. Wells, B. M. Nee, P. L. Chapman and P. T. Krein, “Selective harmonic control: a general problem formulation and selected solutions,” in IEEE Transactions on Power Electronics, vol. 20, no. 6, pp. 1337–1345, Nov. 2005.
Jabr RA. Solution trajectories of the harmonic-elimination problem. Proc Inst Electr Eng. 2006;153:97–104.
Li Li, D. Czarkowski, Yaguang Liu and P. Pillay, “Multilevel selective harmonic elimination PWM technique in series-connected voltage inverters,” in IEEE Transactions on Industry Applications, vol. 36, no. 1, pp. 160–170, Jan.–Feb. 2000,
Z. Du, L. M. Tolbert and J. N. Chiasson, “Harmonic elimination for multilevel converter with programmed PWM method,” Conference Record of the 2004 IEEE Industry Applications Conference, 2004. 39th IAS Annual Meeting., Seattle, WA, USA, 2004, pp. 2210–2215 vol. 4.
J. Vassallo, J. C. Clare and P. W. Wheeler, “A power-equalized harmonic-elimination scheme for utility-connected cascaded H-bridge multilevel converters,” IECON’03. 29th Annual Conference of the IEEE Industrial Electronics Society (IEEE Cat. No.03CH37468), Roanoke, VA, USA, 2003, pp. 1185–1190 Vol. 2.
J. Holtz, W. Lotzkat and K. -H. Werner, “A high-power multi transistor-inverter uninterruptable power supply system,” 1986 17th Annual IEEE Power Electronics Specialists Conference, Vancouver, BC, Canada, 1986, pp. 311–320.
V. G. Agelidis, A. Balouktsis, C. Cossar and I. Balouktsis, “Five-Level Selective Harmonic Elimination PWM Strategies and Multicarrier Phase-Shifted Sinusoidal PWM: A Comparison,” 2005 IEEE 36th Power Electronics Specialists Conference, Dresden, Germany, 2005, pp. 1685–1691.
Zhong Du, L. M. Tolbert and J. N. Chiasson, “Active harmonic elimination for multilevel converters,” in IEEE Transactions on Power Electronics, vol. 21, no. 2, pp. 459–469, March 2006.
V. G. Agelidis, A. I. Balouktsis and M. S. A. Dahidah, “A Five-Level Symmetrically Defined Selective Harmonic Elimination PWM Strategy: Analysis and Experimental Validation,” in IEEE Transactions on Power Electronics, vol. 23, no. 1, pp. 19–26, Jan. 2008.
V. K. Verma, H. K. Meena and S. N, “Selective Harmonic Elimination In 5-Level MLI Using Particle Swarm Optimization,” 2024 Fourth International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT), Bhilai, India, 2024, pp. 1–5, doi:10.1109/ICAECT60202.2024.104692.
S. Shakeera and K. Rachananjali, “Study of Multilevel Inverter with SHE-PWM Using PSO Algorithm,” 2024 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE), Bangalore, India, 2024, pp. 1–5, doi:10.1109/IITCEE59897.2024.10467266.
M. Sadoughi, A. Pourdadashnia, M. F.-Kangarlu and S. Galvani, “PSO-Optimized SHE-PWM Technique in a Cascaded H-Bridge Multilevel Inverter for Variable Output Voltage Applications,” in IEEE Transactions on Power Electronics, vol. 37, no. 7, pp. 8065–8075, July 2022, doi:10.1109/TPEL.2022.
H. Taghizadeh and M. T. Hagh, “Harmonic Elimination of Cascade Multilevel Inverters with Nonequal DC Sources Using Particle Swarm Optimization,” in IEEE Transactions on Industrial Electronics, vol. 57, no. 11, pp. 3678–3684, Nov. 2010, doi:10.1109/TIE.2010.2041736.
T. H. Parray and F. I. Bakhsh, “A Novel Reduced Switch Five-Level Common Ground Transformerless Inverter Feeding an Isolated Load” International Journal of Circuit Theory and Applications, 1–16, 2026, https://doi.org/10.1002/cta.70325.
Ahmad S, Ahmad J, Bakhsh FI. “Optimized harmonic PWM implementation in a reduced switch count MLI with quadruple boosting using PSO for solar PV applications,” Eng Res Express. 2025;7(1):015341.
Ahmad, S., Uddin, R., Ganie, Z. A., Anees, A. S., and Bakhsh, F. I. (2022). Low Frequency Operation and dsPIC Micro-controller Implementation for Multilevel Quasi Z Source Inverter in Photovoltaic Application. Distributed Generation & Alternative Energy Journal, 37(4), 929–958.
Husain, M. A., Rajput, R., Gupta, M. K., Tabrez, M., Ahmad, M. W., and Bakhsh, F. I. (2022). Design and Implementation of Different Drive Topologies for Control of Induction Motor for Electric Vehicle Application. Distributed Generation & Alternative Energy Journal, 37(4), 999–1026.

