Interference Effects of Via Interconnect in Three Layer Printed Circuit Board

Authors

  • Avali Ghosh Guru Nanak Institute of Technology JIS Group, 157/F, Nilgunj Road, Sodepur, Kolkata-700114, India
  • Sisir Kumar Das Guru Nanak Institute of Technology JIS Group, 157/F, Nilgunj Road, Sodepur, Kolkata-700114, India
  • Annapurna Das Guru Nanak Institute of Technology JIS Group, 157/F, Nilgunj Road, Sodepur, Kolkata-700114, India

Keywords:

Crosstalk, electromagnetic compatibility, PCB, transmission line, via, via inductance

Abstract

Cylindrical vias are commonly used for interconnection in multilayered Printed Circuit Board (PCB) design. The RF current through vias causes radiated interference to adjacent traces. This paper describes an analytical method of computing the radiation from cylindrical via using the electromagnetic theory. Three layer printed circuit board consisting of three traces on the top of a dielectric substrate, a middle orthogonal trace and a ground plane at the bottom, is considered. The RF voltage coupling at the terminations of the traces due to the near field radiation from the via is computed. The reactive couplings between the traces are determined from the parasitic elements using transmission line equations. The total coupling obtained from analytical method is compared with those of modeling and simulation with Ansoft HFSS software tool. The total crosstalk is also measured using an available Network Analyzer. A good agreement is found. The changes of radiated coupling with the change of position of via, trace separation and trace length are also investigated. This paper shows that the analytical method is a useful tool for predicting interference in PCB without using expensive simulation software.

Downloads

Download data is not yet available.

References

C. R. Paul, Introduction to Electromagnetic Compatibility. John Wiley & Sons, Inc., 1992.

R. Pucel, Gallium Arsenide Technology. D. Ferry, Ed., Indianapolis, IN: Howard W. Sams and Co., Ch. 6, pp. 216, 1985.

M. E. Goldfarb and R. A. Puce1, “Modeling via hole grounds in microstrip,” IEEE Microwave Guided Wave Letter, vol. 1, no. 6, pp. 135-137, June 1991.

W. Cui, X. Ye, B. Archambeault, D. White, M. Li, and J. L. Drewniak, “EMI resulting from signal via transitions through the DC power bus,” 2000 IEEE International Symposium on Electromagnetic Compatibility, vol. 2, pp. 821-826, Aug. 21-25, 2000.

S. Li, Y. Liu, Z. Song, and H. Hu, “Analysis of crosstalk of coupled transmission lines by inserting additional traces grounded with vias on printed circuit boards,” Asia Pacific Conference on Environmental Electromagnetics, CEEM'2003, Hangzhou, China, Nov. 4-7, 2003.

A. Suntives, A. Khajooeizadeh, and R. Abhari, Using Via Fences for Crosstalk Reduction in PCB Circuits, 1-4244-0293-X/06/$20.00(c) 2006 IEEE.

S. Nam, Y. Kim, J. H. Hur, S. Song, B. J. Lee, and J. Jeong, “Performance analysis of signal vias using virtual islands with shorting vias in multilayer PCBs,” IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 4, Part 11315-1324, June 2006.

I. Ndip, F. Ohnimus, S. Guttowski, and H. Reichl, “Modeling and analysis of return-current paths for microstrip-to-microstrip via transitions,” IEEE Electronic System-Integration Technology Conference (ESTC 2008), London, UK, Sep. 1-4, 2008.

Y.-J. Zhang and J. Fan, “An intrinsic circuit model for multiple vias in an irregular plate pair through rigorous electromagnetic analysis,” IEEE Trans. Microwave Theory Tech., vol. 58, no. 8, pp. 2251-2265, Aug. 2010.

S. Wu and J. Fan, “Analytical prediction of crosstalk among vias in multilayer printed circuit boards,” IEEE Transactions on Electromagnetic Compatibility, vol. 54, no. 2, Apr. 2012.

S. Pan and J. Fan, “Characterization of via structures in multilayer printed circuit boards with an equivalent transmission-line model,” IEEE Transactions on Electromagnetic Compatibility, vol. 54, no. 5, Oct. 2012.

A. Isidoro-Munoz, R. Torres-Torres, M. A. Tlaxcalteco-Matus, and G. Hernandez-Sosa, “Scalable models to represent the via-pad capacitance and via-traces inductance in multilayer PCB high speed interconnects,” 2017 International Conference on Devices, Circuits and Systems (ICCDCS), 2017.

T. Sakurai and K. Tamaru, “Simple formulas for two- and three-dimensional capacitances,” IEEE Transactions on Electron Devices, vol. ED-30, no. 2, Feb. 1983.

A. Ghosh, S. K. Das, and A. Das, “Analysis of radiation coupling from via in multilayer printed circuit board traces,” 14th International Conference on Electromagnetic Interference & Compatibility (INCEMIC 2016) and Workshop, Bengaluru, India, Dec. 8-9, 2016. Electronic ISBN: 978-1-5090- 5840-2. DOI: 10.1109/INCEMIC.2016.7921461

A. Ghosh, S. K. Das, and A. Das, “Analysis of crosstalk in high frequency printed circuit boards in presence of via,” International Conference on Electromagnetics in Advanced Applications IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications 2017, Verona, Italy, Sep. 11-15, 2017. Electronic ISBN: 978-1-5090-4451-1. DOI: 10.1109/ICEAA.2017. 8065265

R. F. Harrington, Time - Harmonic Electromagnetic Fields. Donald G. Dudley, Series Editor, Wiley Publication.

C. A. Balanis, Advanced Engineering Electromagnetics. John Wiley & Sons, New York, 1989.

Downloads

Published

2021-07-22

How to Cite

[1]
Avali Ghosh, Sisir Kumar Das, and Annapurna Das, “Interference Effects of Via Interconnect in Three Layer Printed Circuit Board”, ACES Journal, vol. 33, no. 09, pp. 1040–1047, Jul. 2021.

Issue

Section

General Submission