CMOS High Swing and Q Boosted Dual Core Voltage Controlled Oscillator for 5G New Radio Application

作者

  • Pravinah Shasidharan Collaborative Microelectronic Design Excellence Center (CEDEC) Universiti Sains Malaysia, Sains @USM, Bayan Lepas (Penang), 11900, Malaysia
  • Jagadheswaran Rajendran Collaborative Microelectronic Design Excellence Center (CEDEC) Universiti Sains Malaysia, Sains @USM, Bayan Lepas (Penang), 11900, Malaysia
  • Selvakumar Mariappan Collaborative Microelectronic Design Excellence Center (CEDEC) Universiti Sains Malaysia, Sains @USM, Bayan Lepas (Penang), 11900, Malaysia
  • Narendra Kumar Department of Electrical Engineering, Faculty of Engineering University of Malaya, Kuala Lumpur, 50603 Malaysia
  • Masuri Othman Institute of Microengineering and Nanoelectronics National University of Malaysia Bangi, 43600, Malaysia

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https://doi.org/10.13052/2023.ACES.J.380610

关键词:

cascode, CMOS, cross-coupled pair, 5G, New Radio, Q enhancement, switched varactor array (SVA), Voltage Controlled Oscillator

摘要

This paper describes a low power, low phase noise CMOS voltage controlled oscillator (VCO) with a cascoded cross-coupled pair (XCP) configuration for high data rate 5G New Radio (5G-NR) applications. The core consists of a primary auxiliary VCO built as a negative conductance circuit to improve phase noise and a secondary core with a cascoded formation to increase output voltage swing. A switched varactor array (SVA) wideband tuner is integrated for a wide bandwidth application in a low power implementation. The dual-core VCO was designed in CMOS 130 nm technology and occupies only 1.05 mm2 of space. With a supply voltage of 1.2 V, the VCO achieved a tuning range of 32.43% from 3.45 GHz to 4.47 GHz. At 3.96 GHz carrier center frequency with 1 MHz offset, the total power consumption is 0.7 mW with a corresponding phase noise (PN) of −121.25 dBc/Hz and a Figure of Merit (FoM) of 193.25 dBc/Hz. The results are validated using Cadence Spectra RF simulations.

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Pravinah Shasidharan is currently pursuing a Ph.D. degree in microelectronics at the Universiti Sains Malaysia (USM), Pulau Pinang. Her research interest is in CMOS RFIC design.

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Jagadheswaran Rajendran (SM’16) is currently serving as a senior lecturer at the Collaborative Microelectronic Design Excellence Center (CEDEC) and School of Electrical and Electronic Engineering, Universiti Sains Malaysia. His work is on CMOS analog IC design, CMOS Radio Frequency (RF) IC design and GaAs Monolithic Microwave Integrated Circuit (MMIC) design. To date, he has published 70 research papers, mainly in journals, and holds one US patent. Jagadheswaran Rajendran was the recipient of the IEEE Circuit and System Outstanding Doctoral Dissertation Award in 2015. He served as the Chairman of IEEE ED /MTT/SSC Penang Chapter for the years 2011 and 2018. He is also a senior member of IEEE.

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Selvakumar Mariappan received his B. Eng. Tech. Degree (Hons.) in electrical engineering technology from the Technical University of Malaysia Melaka (UTeM) in 2017. He completed his Ph.D. degree in microelectronics system engineering from Universiti Sains Malaysia in 2022. He was a scholarship recipient of the Industry Graduate Research Assistant Scholarship Programme (i-GRASP) from CREST R&D, Malaysia. Selvakumar Mariappan was a post-graduate intern in Silterra Malaysia Sdn. Bhd. from 2018 to 2021 where he was involved in various IC design activities from device modelling to IC measurements. He was with QRF Solutions Sdn. Bhd. from May 2021 to August 2022 as an IC designer where he worked on numerous RFIC design projects. He served as a Post-Doctoral Fellow at the Collaborative Microelectronic Design Excellence Center (CEDEC), Universiti Sains Malaysia from September to November 2022 before being promoted to Senior Lecturer there in December 2022.

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Narendra Kumar received his doctorate degree in electrical engineering from RWTH Technical University Aachen, Aachen, Germany. From early 1999 he was with Motorola Solutions, holding the position of Principal Staff Engineer (product development and testing). Since January 2011 he has been a Visiting Professor to Istanbul University. Since August 2013, he has been with the Department of Electrical Engineering at the University of Malaya, serving as an Associate Professor. He holds three US patents and four defensive patents in the area of microwave power amplifiers, all assigned to Motorola Solutions. He has authored more than 80 papers in technical journals and conferences, and three technical books published in the USA.

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Masuri Othman received his master’s degree in optoelectronics from the University of Essex, UK, and his Ph.D. degree in microelectronics from the University of Southampton, UK. His main research interests are intheareas of microelectronics and IC design, energy harvesters and technology planning and commercialization. He joined the National University of Malaysia in 1978, was promoted to an Associate Professor in 1989, and subsequently in 1996 to the post of a Professor in microelectronics. He was the Deputy Director of the Institute of Micro and Nanoelectronics (IMEN), UKM, from 2004 to 2006. He was on secondment to the Malaysian Institute of Microelectronics (MIMOS) from 2005 to 2011 as the Director of MEMS and Nanotechnology and at the same time has produced more than 20 patents mainly in the areas of MEMS and energy harvesting. From 2011 to 2014, he was the Commercialization Director at the Ministry of Science and Technology, Malaysia. In 2016, he rejoined IMEN with the main task of spearheading frontier research as well as the technology commercialization of the research and development. During his tenure he has produced more than 100 research papers and has won several national awards in his research areas.

参考

M. Shahmohammadi, M. Babaie, and R. B. Staszewski, “Tuning range extension of a transformer-based oscillator through common-mode Colpitts resonance,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 64, no. 4, pp. 836-846, Apr. 2017.

D. Hauspie, E. C. Park, and J. Craninckx, “Wideband VCO with simultaneous switching of frequency band, active core and varactor size,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 452-455, July 2006.

O. El-Aassar and G. M. Rebeiz, “A dual-core 8-17 GHz LC VCO with enhanced tuning switch-less tertiary winding and 208.8 dBc/Hz peak FoMT in 22nm FDSOI,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, CA, USA, pp. 247-250, Aug. 2020.

Y. Luo, C. Ma, Y. Gan, M. Qian, and T. Ye, “A dual-band CMOS LC-VCO with highly linear frequency tuning characteristics,” Microelectronics J., vol. 46, no. 12, pp. 1420-1425, June 2015.

H. Amir-Aslanzadeh, E. J. Pankratz, C. Mishra, and E. Sanchez-Sinencio, “Current-reused 2.4-GHz direct-modulation transmitter with on-chip automatic tuning,” IEEE Trans. Very Large Scale Integr. Syst., vol. 21, no. 4, pp. 732-746, Apr. 2013.

M. Fang, A. Kumura, and T. Yoshimasu, “A 210.4-dBc/Hz FoMT 67.9% tuning range LC-VCO IC with a single analog voltage-controlled novel varactor in 40-nm CMOS SOI,” IEEE International Symposium on Radio-Frequency Integration Technology, Hualien, Taiwan, pp. 2021-2023, Aug. 2021.

B. Park, S. Lee, S. Choi, and S. Hong, “A 12-GHz fully integrated cascode CMOS LC VCO with Q-enhancement circuit,” IEEE Microwave and Wireless Components Letters, vol. 18, no. 2, pp. 133-135, Feb. 2008.

H. Kim, S. Ryu, Y. Chung, J. Choi, and B. Kim, “A low phase-noise CMOS VCO with harmonic tuned LC tank,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 7, pp. 2917-2923, July 2006.

B. D. Williamson, “A 2.4 GHz LC-VCO using on-chip inductors and accumulation-mode varactors in a CMOS 0.18 μ

m process,” Master’s thesis, University of Tennessee, Knoxville, TN, 2005.

S. Chatterjee, Y. Tsividis, and P. Kinget, “0.5-V analog circuit techniques and their application in OTA and filter design,” IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2373-2387, Dec. 2005.

M. Fang and T. Yoshimasu, “A -197.3-dBc/Hz FoMT wideband LCVCO IC with a single voltage-controlled IMOS-based novel varactor in 40-nm CMOS SOI,” IEEE Trans. Microw. Theory Techn., vol. 68, no. 10, pp. 4116-4121, Oct. 2020.

T. Azadmousavi and E. N. Aghdam, “A low power current-reuse LC-VCO with an adaptive body-biasing technique,” AEUE - Int. J. Electron. Commun., vol. 89, pp. 56-61, May 2018.

T. Siriburanon, W. Deng, K. Okada, and A. Matsuzawa, “A current-reuse Class-C LC-VCO with an adaptive bias scheme,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Seattle, WA, USA, pp. 35-38, June 2013.

S. Ikeda, S. Lee, H. Ito, N. Ishihara, and K. Masu “A 0.5 V 5.96-GHz PLL with amplitude-regulated current-reuse VCO,” IEEE Microwave and Wireless Components Letters, vol. 27, no. 3, pp. 302-304, Mar. 2017.

V. J. Higgins, F. A. Brand, and J. J. Baranowski, “Characteristics of varactor diodes biased into avalanche,” International Electron Devices Meeting, Washington, DC, USA, pp. 14-14, Oct. 1965.

C. Sánchez-Azqueta, J. Aguirre, C. Gimeno, C. Aldea, and S. Celma, “High-resolution wide-band LC-VCO for reliable operation in phase-locked loops,” Microelectronics Reliability, vol. 63, pp. 251-255, Aug. 2016.

M. Garampazzi, P. M. Mendes, N. Codega, D. Manstretta, and R. Castello, “Analysis and design of a 195.6 dBc/Hz peak FoM P-N class-B oscillator with transformer-based tail filtering,” IEEE J. Solid-State Circuits, vol. 50, no. 7, pp. 1657-1668, July 2015.

Y. Peng, L. Zhou, Y. Yu, H. Liu, Y. Wu, C. Zhao, H. Tang, and K. Kang, “A harmonic-tuned VCO with an intrinsic-high-Q F23 inductor in 65-nm CMOS,” IEEE Microwave and Wireless Components Letters, vol. 30, no. 10, pp. 981-984, Oct.2020.

C. H. Chun, H. S Choi, Q. D Bui, S. Y Kang, J. Y Jang, U. B. Lee, I. Y. Oh, and C. S. Park, “Compact wideband LC VCO with active inductor harmonic filtering technique,” Electronic Letters, vol. 47, no. 3, pp. 190-191, Feb. 2011.

J. Du, X. Zhang, C. Zhang, F. Meng, and N. Yan, “An ultra-wideband VCO using digitally controlled varactor arrays in 40-nm CMOS technology,” IEEE MTT-S International Wireless Symposium (IWS), Nanjing, China, pp. 1-3, May 2021.

P. Shasidharan, H. Ramiah, and J. Rajendran, “A 2.2 to 2.9 GHz complementary class-C VCO with PMOS tail-current source feedback achieving -120 dBc/Hz phase noise at 1 MHz offset,” IEEE Access, vol. 7, pp. 91325-91336, July 2019.

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已出版

2023-06-30