CAT-TAIL DMA: EFFICIENT IMAGE DATA TRANSPORT FOR MULTICORE EMBEDDED MOBILE SYSTEMS

Authors

  • SENYO APEWOKIN Georgia Institute of Technology, U.S.A.
  • BRIAN VALENTINE Georgia Institute of Technology, U.S.A.
  • LINDA M. WILLS Georgia Institute of Technology, U.S.A.
  • SCOTT WILLS Georgia Institute of Technology, U.S.A.

Keywords:

DMA, background modeling, embedded computer vision, mobile vision systems, multicore, parallel processing

Abstract

The emergence of multicore platforms has tremendous potential for achieving real-time performance of complex computer vision algorithms. However, these applications must run on embedded, mobile platforms with stringent size weight, power, and cost constraints. High utilization of local storage on execution cores and low-latency, highbandwidth data transfers between this storage and main memory are critical for real-time mobile system performance. General purpose processors employ hardware techniques, such as high-speed bus architecture and efficient data arbitration schemes, to address the memory bandwidth gap. However, these techniques are insufficient for mobile systems requirements. Concurrent algorithmic and architectural optimizations are necessary. This paper uses concurrency to minimize data transfer latency when executing video surveillance algorithms on multicore embedded architectures. It introduces cat-tail DMA, a technique that provides low-overhead, globally-ordered, non-blocking DMA transfers. Using this technique, data transfer latencies are reduced by over 30% for background modeling applications, while the local core storage utilization is increased by 60% over existing techniques.

 

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Published

2010-01-15

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